Added Simulation

e39b70ce · David Huss · 617ab855 · e39b70ce
Commit e39b70ce authored Nov 08, 2018 by David Huss 💬
Hide whitespace changes
Inline Side-by-side

Showing with 1 addition and 0 deletions

README.md README.md +1 -0

No files found.
--- a/README.md
+++ b/README.md
@@ -3,5 +3,6 @@ Simple bipolar clock generator with PWM, buffered outputs, one inverted output a

 ![Clockgen Schematic](clockgen-simple-ws2018.png)

+Simulation [is here](http://tinyurl.com/ybsu7nqu)

 v0.1 20181108